Míreanna comhchosúla: DESIGN AND ANALYSIS OF ENERGY EFFECIENT SRAM ARRAY USING 8T SRAM CELL WITH IN-MEMORY MAC CAPABILITIES FOR EDGE AI APPLICAATIONS /
- MacArthur as military commander /
- The Mac OS X Tiger book /
- The innovation edge : creating strategic breakthroughs using the voice of the customer /
- Stem cells and cell therapy /
- COMRADE MONI SINGHA MEMORIAL COMPLEX /
- CHARACTERISTIC ANALYSIS OF NACA 0018 AND NACA 2412 AIRFOIL WITH LEADING EDGE AND TRAILING EDGE ROTATING CYLINDER /
Topaic: Electrical, Electronic and Communication Engineering.
- EFFECT OF POLARIZATION MODE DISPERSION (PMD) IN DIFFERENT CORE SHAPES AND BIT ERROR RATE (BER) PERFORMANCE IN FIBER OPTIC COMMUNICATION /
- PERFORMANCE ANALYSIS OF AN OPTICAL CROSS CONNECT AT DWDM SYSTEM /
- AVAILABLE TRANSFER CAPABILITY ASSESSMENT OF THE WESTERN GRID OF BANGLADESH POWER SYSTEM /
- PERFORMANCE ANALYSIS OF DIFFERENT TRACKING FILTERS FOR IMPROVING ACCURACY IN RADAR DETECTION /
- A STUDY ON PARAMETRIC ANALYSIS OF CARBON NANO TUBE ORGANIC SOLAR CELLS /
- DEVELOPMENT OF A QUANTUM MECHANICAL DEVICE SIMULATOR FOR MOS DEVICES: A SCHRODINGER APPROACH /
Topaic: This Thesis Paper of EECE in BSc Program.
- A COMPARATIVE STUDY OF INORGANIC LEAD HALIDE PEROVSKITES BY ANALYZING THEIR ELECTRICAL, OPTICAL AND MECHANICAL PROPERTIES /
- A COMPREHENSIVE INVESTIGATION OF GaSb/GaAs0.5Sb0.5/GaAs BASED DG-HJ-SP-HD VERTICAL TUNNEL FET FOR OPTIMIZED LOW POWER APPLICATIONS: EXPLORING THE IMPACT OF DEVICE PARAMETER VARIATIONS /
- FINE-TUNED U-NET VARIATS WITH EXTENDED ARCHITECTURE FOR ENHANCED MICROSCOPIC IMAGE SEGMENTATION /
- ANALYSIS OF LIGHTNING STRIKE EFFECTS ON POWER MOSFETS AND PROTECTIVE CIRCUIT DESIGN /
- WAVLORA-SAM: WAVELET-ENHANCED LOW-RANK ADAPTATION OF SAM 2.1 WITH MULTISCALE HYBRID PROMPTING FOR EXPLAINABLE SKIN LESION SEGMENTATION/
- CHARACTERIZATION AND PREDICTION OF IONOSPHERIC SCITILLIATION OVER SOUTH ASIA USING MULTI-CONSTELLATION GNSS OBSERVATIONS /
Údar: Shariar, Jahin
Údar: Supervised by Lt Col Md Tawfiq Amin
- A CONTROL-OPTIMIZED AND ULTRA-COMPACT CRYPTOGRAPHIC VLSI ARCHITECTURE FOR ENHANCED DATA SECURITY /
- DESIGN AND ANALYSIS OF ENERGY EFFECIENT SRAM ARRAY USING 8T SRAM CELL WITH IN-MEMORY MAC CAPABILITIES FOR EDGE AI APPLICAATIONS /
- DESIGN AND PERFORMANCE ANALYSIS OF LOW POWER LOW NOISE DUAL GATED GRAPHENE-MOSFET BASED VCO FOR WIRELESS APPLICATIONS /
- DESIGN AND ANALYSIS OF A 5GB/S HALF-RATE CLOCK AND DATA RECOVERY CIRCUIT IN 90 NM CMOS TECHNOLOGY /
- DESIGN AND ANALYSIS OF AN ARFA EFFICIENT AND LOW POWER VCO BASED ADC FOR BIOMEDICAL APPLICATIONS /
- PHYSICS BASED MODELING AND CIRCUIT LEVEL EVALUATION OF SI-ON SIC MOSFET FOR HIGH-SPEED AND LOW POWER VLSI APPLICATIONS /