CMOS Circuit Design, Layout, and Simulation /

Tallennettuna:
Bibliografiset tiedot
Päätekijä: Baker, R. Jacob, 1964-
Yhteisötekijä: Institute of Electrical and Electronics Engineers
Aineistotyyppi: Kirja
Kieli:englanti
Julkaistu: New Jersey : IEEE Press, Wiley, c2019
Painos:4th ed.
Sarja:IEEE Press series on microelectronic systems
Aiheet:
Linkit:Contributor biographical information
Publisher description
Table of contents only
Book review (E-STREAMS)
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100 1 |a Baker, R. Jacob,  |d 1964- 
245 1 0 |a CMOS Circuit Design, Layout, and Simulation /  |c R. Jacob Baker. 
250 |a 4th ed. 
260 |a New Jersey :  |b IEEE Press,  |b Wiley,  |c c2019  
300 |a xxxv,1235 p. :  |b ill. ;  |c 28 cm. 
490 |a IEEE Press series on microelectronic systems 
500 |a "IEEE Solid-State Circuits Society, sponsor." 
504 |a Includes bibliographical references and index. 
541 |e 75989 
650 0 |a Metal oxide semiconductors, Complementary  |x Design and construction. 
650 0 |a Integrated circuits  |x Design and construction. 
650 0 |a Metal oxide semiconductor field-effect transistors. 
710 2 |a Institute of Electrical and Electronics Engineers. 
856 4 2 |3 Contributor biographical information  |u http://www.loc.gov/catdir/enhancements/fy0620/2004275960-b.html 
856 4 2 |3 Publisher description  |u http://www.loc.gov/catdir/enhancements/fy0620/2004275960-d.html 
856 4 1 |3 Table of contents only  |u http://www.loc.gov/catdir/enhancements/fy0620/2004275960-t.html 
856 4 2 |3 Book review (E-STREAMS)  |u http://www.e-streams.com/es0902/es0902_4363.html 
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